Talk:Parallel ATA

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Suggested fix for picture of cables

On my monitor I can't see any difference between the "80 conductor cable" and the "40 conductor cable" (second picture), except that the connectors are colored. I think we should find a picture that better shows the different conductor spacing. All of you others, get right on that. ;) Seriously, I'll see if I can't take one myself. Jeh 09:19, 21 October 2006 (UTC)[reply]

IDE and ATA are the same thing?

I thought ATA is a type of IDE drive/cable, not that they are the same thing, like this article says. the article on SATA says all ATA drives are IDE drives, not that they are the same thing —The preceding unsigned comment was added by The snare (talk • contribs).

I think the confusion comes from the fact that the abbreviation IDE has taken on a different meaning from the words that make it up. IDE at least in common use refers not to "integrated drive electronics" but to one particular system of connecting to integrated drive electronics. The same goes for HTML (one particular hypertext markup language, not hypertext markup languages in general) CSS (one particular system for cascading style sheets) etc. Plugwash 12:26, 23 January 2007 (UTC)[reply]
The confusion comes from the fact that IDE was never properly spec'ed out. SCSI, PATA, and SATA are all IDE implementations - therefore it is completely misleading and wrong to do as this article claims and say PATA=IDE. When I have the time, I'll get some proper references and do my best to clean this disaster up. --Riluve 05:47, 17 February 2007 (UTC)[reply]

Future enhancements

what are the future enhancements of ATA (unsigned comment)

See T13.org 81.2.110.250 21:42, 16 August 2007 (UTC)[reply]

what is 40/80 physical connection?

Here and elsewhere I see

"The 80-wire cable provides one ground wire to each signal wire.... Though the number of wires doubled, the number of connector pins remains the same as on 40-conductor cables. The physical connectors are identical between the two cable types."

But nowhere does anyone explain how that works. Isn't anyone besides me curious? I've spent about an hour googling for a description of the 40-pin connector that magically connects very other wire in an 80-wire cable to ground. I *have* one of thesein my hand, and I may go crazy and just take it apart, thus wasting $2.50....

-- jgo / owen_bda4@yahoo.com

The purpose of an 80 wire cable is to reduce capacitive coupling, a phenomenon that occurs between wires that carry signals at high frequencies. Putting a ground wire between data wires couples the data wires to ground instead of to another data wire, reducing interference in the data carrying wires.
It would seem necessary to have an 80 pin connector for 80 wires, however, there only needs to be one ground connector pin at most, although there are several shown in the diagram, and all of the ground wires share the ground connection, (they are connected in some way inside of the connector). (unsigned comment, i cba to dig through the page history to find out whoose)
afaict its a special connector made specifically to do this extra grounding, not any kind of standard part from the electronics industry. When you standard is as widely used as ATA is you can afford to specify custom connectors to provide backwards compatibility whilst allowing a better wiring type. Plugwash 00:04, 30 September 2005 (UTC)[reply]
cleaned up the description of the 80-wire cable and the connector. Jeh 22:25, 8 October 2005 (UTC)[reply]

ATAPI != ATA

ATAPI is a specific form of communication across ATA for optical and other removable media drives, as noted in the article's section on ATAPI, not a synonym for ATA as the introduction claimed. Matir 15:39, 18 October 2006 (UTC)[reply]

I think you are wrong, ATAPI DOESN'T describe optical communcation. I think you are getting confused that CD / DVD / BR ROM/ +R/RW are known optical drives. The optical drives itself doesn't mean they use "optical communications." Optical Communications is using photons to transfer speed.

--Ramu50 (talk) 01:04, 1 June 2008 (UTC)[reply]

Parallel ATA Interface

The second paragraph needs to be rewritten or at least copyedited. The necessary changes are above my command of the english language. The problem is in the redundancy of electromagnetic induction and crosstalk (the latter is caused by the former).--Deelkar (talk) 02:13, 18 May 2005 (UTC)[reply]

Done. The actual issue here is capacitive coupling, since that is more of a problem at higher freqs, just the opposite of inductive coupling. Jeh 22:33, 8 October 2005 (UTC)[reply]

"Parallel ATA cables transfer data 16 or 32 bits at a time."

How can you do 32 bit transfers with only 16 data pins? Maybe the 32 bits are transfered between ATA controller and CPU/DMA controller, but i doubt you can do this on the ATA bus.

You can't. Fixed. Jeh 22:33, 8 October 2005 (UTC)[reply]
Common misconception - many drives and controllers support 32bit PIO (word 48 bit 0 in the pre-ATA spec) but this is for an optimisation on the host end permitting 32bit access cycles from the processor to the host adapter not for the cable 81.2.110.250

master/slave terminology

In a comment imbedded in the article page, Plugwash asked:

Is it fair to say that the idea of master/slave probablly originated from the way the master is generally the boot drive and the slave is then acting as a slave to whatever the code loaded from the master decides to do ?

My response (I'm the guy who put in the "they aren't really called 'master' and 'slave'" paragraph):
That seems like quite a stretch to me. There is another hint of an origin back in the ATA-1 spec in the description of the SPSYNC (Spindle sync) interface signal (section 6.3.16). But even there, both devices could be "slaves" to a sync signal from the host controller! SPSYNC was relegated to simply "defined by the vendor" status in ATA-2 and dropped completely in ATA-3. It shared the same pin on the 40-pin connector with CSEL (cable select) and so when CSEL became more strongly recommended, SPSYNC had to go. And... shouldn't this sort of thing be in the talk page? Jeh 06:44, 2 October 2005 (UTC)[reply]
Master and slave have less to do with the OS's conception of logical devices as they do with the AT BIOS and the origins of ATA itself. ATA's register set is based directly on the old Western Digital 1003 ST-506 controller board used in the AT (and cloned by just about everyone back in the pre-ATA days), and the 1003 could either have one drive as Drive 0, or two drives as Drive 0 and Drive 1 -- you couldn't have a single drive as Drive 1, because the BIOS wouldn't boot from it (and I think IBM's own BIOS would complain about it, actually). On ATA, this setup is emulated by the drives listening to the bus (all commands are available to both drives) and seeing what the DEV bit in the Device/Head register is set to, then only interpreting commands that it expects to see based on its jumper settings. This used to be undefined behavior in a single-drive-set-to-Slave system, but later versions of ATA let you run a drive jumpered as Slave or Drive 1 by itself, with some restrictions. Also, if the drives can't agree on who has control of the bus, you've got problems, and this was a big issue back in the early days (when there were various methods of deciding if there was a slave present).
Also, SPSYNC was an artifact of the days when drives didn't have a lot of on-board cache, and synchronising the spindles actually made a difference with access times; when drives started having caches capable of holding hundreds of sectors at a time (even a 512k cache, common in the late 1990s but puny by 2005 standards, can hold 1024 512-byte sectors...), this became a lot less important, and people stopped using it. -lee 16:08, 22 November 2005 (UTC)[reply]

Cany anyone explain to me what does spindle means in SPYSNC. Also did AT-attachment originated from Daisy Chaining? Lastly, does the ATAPI describe the Int 13 addressing, because I was thinking it might be a good idea to merge them. --Ramu50 (talk) 16:46, 1 June 2008 (UTC)[reply]

is cable select mandatory

in the standard for the 80 wire cables, they certainly all seem to have it in practice. Plugwash 13:09, 9 October 2005 (UTC)[reply]

I'm not sure. I think so... but the wording is a little vague. Jeh 20:08, 9 October 2005 (UTC)[reply]
CS is not mandatory and the pins can be used for spindle sync and other purposes. See ATA-1 documents 81.2.110.250

What's the meaning of Ultra DMA/100, /133, etc...

The article should mention what is the meaning of "Ultra DMA/100", "Ultra DMA/133", etc. I have always assumed the number was the maximum burst throughput in megabytes per second, but I've had a surprisingly difficult time looking for the answer to this.

While discussing the throughput rate, it would also be good to mention whether the /100 or /133 (etc) burst rate makes any real-world difference, typically, with a reference to typical sustained throughput rates of today's ATA hard disks. Tempshill 19:39, 10 October 2005 (UTC)[reply]

Good point. "Ultra DMA/100", etc., are unofficial names. Yes, the number is the max transfer rate on the bus in MB/sec. They're commonly used on drive boxes because it's far easier to remember that "Ultra DMA/100 means 100 MB/sec" than it is to remember that for the official name of "Ultra DMA 4." And yes, these make little difference for today's (or even tomorrow's) hard drives.
The short paragraph immediately above the "modes" table mentions this a bit. I've been thinking that that should go UNDER the "Modes" table, or at least under the heading where the table is, and that is a good place to amplify these points too. Jeh 23:45, 10 October 2005 (UTC)[reply]
... ok, done. What does anyone think? Did I get too far into opinion in dismissing STR results as not important? If you think so, you know where the "edit" button is. ;) Jeh 00:35, 11 October 2005 (UTC)[reply]
Not at all; this type of analysis is what is needed in technical Wikipedia articles. I thought the sentence "In addition, as of October 2005 no ATA hard drives exist capable of measured sustained transfer rates of above 80 MB/s, let alone higher" formed an excellent grounding for that whole discussion. Thanks! Tempshill 05:38, 13 October 2005 (UTC)[reply]

Three devices on a cable?

The page says

One occasionally finds cables that allow for the connection of three ATA devices onto one IDE channel, but in this case one drive remains read-only (this type of configuration virtually never occurs).

and then someone added this comment: how is that done then?

I'd like to know that too. It seems to me that I may have seen (how's that for indefinite?) configurations like this involving some of those cheap ratty little tape drives sold for PCs. But I don't really believe it; I think I'm thinking of similar kluges on floppy cables, which I know did exist.

Whatever, such a configuration is absolutely not supported or allowed by the ATA specs.

My first impulse is to delete this reference completely, as in "no, it didn't ever happen." But I certainly haven't seen even a tiny fraction of all the nonstandard (or even all the standard) things that have been attached to PCs over the years. So... does anyone have anything more definite than a vague memory of how this worked? Since there's only one bit for "device address" in the ATA command structure I am not at all certain how this could have worked, but of course if someone has seen it working, that blows all theoretical arm-waving out of the water... Jeh 23:33, 10 October 2005 (UTC)[reply]

It could work, theoretically, by commandeering one of the unused bits in the Device/Head register, but the other drives would have to know about what you did for it to work right. This works better on floppy setups because the floppy bus has 4 device select lines. -lee 16:11, 22 November 2005 (UTC)[reply]
How does the controller indicate what drive it wants active anyway? Plugwash 23:40, 19 March 2006 (UTC)[reply]
An ATA controller works by writing binary-coded commands into registers implemented on each device. One of these is called the Device register; each device has one (and several others). Unlike in older interfaces like ST-506, there are no "device select" lines in the cable. There are bits (the CS, chip select, and DA, device address) in the wires that indicate which register is being addressed, but whatever is sent is actually written into the selected registers of both devices on the cable. The devices figure out which commands to pay attention to and which to ignore by looking at the DEV bit in the Device register. When reading from device registers, only the device whose logical address ("device 0" or "device 1") matches this bit responds. Since there is only one bit there is no obvious way to support more than two devices! Jeh 03:16, 2 August 2006 (UTC)[reply]
It seems the 40 pin version has a spare GPIO pin that has now been commondeered for detecting 80 pin cables, presumablly this could be used to drive some very simple logic that deactivated the chip select line to one of two pairs of drives. Plugwash 01:14, 1 June 2007 (UTC)[reply]
er, how, when it's already in use for the 80-wire cable detect? Anyway, no one to my knowledge ever did that. Funnily enough, I once found an "IDE cable" at Fry's that had connectors for seven devices on it. I just had to buy ot for the novelty value! It couldn't possibly work, of course! Jeh 01:31, 1 June 2007 (UTC)[reply]
7-device IDE cable - aren't these kinda cables sold so you can locate 2 drives anywhere along the length of the cable? Can be useful when you're building a PC into a non-standard case. —Preceding unsigned comment added by 194.193.86.112 (talk) 09:15, 24 September 2007 (UTC)[reply]
Exabyte had some kind of interface nesting device on some of their hardware. Not sure how it worked but this may be what is described ? 81.2.110.250 21:44, 16 August 2007 (UTC)[reply]


It looks to me that there are two device select bits, one for device 0, one for device 1. I believe it is undefined for both bits to be active (low) at the same time. It may or may not be defined as to the effect when both are inactive (high).

Gah4 04:50, 12 September 2007 (UTC)[reply]

True, there are two select lines. CS0 and CS1, for "chip select", as these go directly to the correspondingly named pins on the interfaces on the two drives. If you know how "chip select" pins work, then you will recognize that when CSn is inactive, the output-only and I/O pins on the corresponding drive are tri-stated. If you pull both CS0 and CS1 low, both drive's interfaces will be active on the cable... and no good can come from that whether the spec says it's "undefined" or not! We *might* be able to get away with having both inactive mean "drive 2 selected"... thereby adding a third drive, but not a fourth... but I wouldn't trust my data to any such arrangement. Jeh 21:56, 26 September 2007 (UTC)[reply]

"Maximum disk size" values wrong

For all I know, the total number of addressable sectors was 2**28 (28 bit) from ATA-1 onwards, in both CHS and LBA mode. Which means 2**28 * 512 Byte = 128 GiB maximum disk size for all ATA specs prior to the introduction of the 48-bit extensions in ATA-6.

Quoted from the ATA-1 spec (http://www.t13.org/project/d0791r4c-ATA-1.pdf): 

7.2.3 Cylinder high register
This register contains the high order bits of the starting cylinder address
for any disk access. [...]
In LBA Mode this register contains Bits 16-23. At the end of the command,
this register is updated to reflect the current LBA Bits 16-23.
NOTE 4 - Prior to the introduction of this standard, only the lower 2 bits of
this register were valid, limiting cylinder address to 10 bits i.e., 1024
cylinders.
7.2.4 Cylinder low register
This register contains the low order 8 bits of the starting cylinder address
for any disk access. At the end of the command, this register is updated to
reflect the current cylinder number.
In LBA Mode this register contains Bits 8-15. At the end of the command, this
register is updated to reflect the current LBA Bits 8-15.
[...]
7.2.8 Drive/head register
[...]
- If L=0, HS3 through HS0 contain the binary coded address of the head to
be selected e.g., if HS3 through HS0 are 0011b, respectively, head 3
will be selected. HS3 is the most significant bit. At command
completion, these bits are updated to reflect the currently selected
head.
- If L=1, HS3 through HS0 contain bits 24-27 of the LBA. At command
completion, these bits are updated to reflect the current LBA bits
24-27.
[...]
7.2.12 Sector number register
This register contains the starting sector number for any disk data access for
the subsequent command. The sector number may be from 1 to the maximum number
of sectors per track.
In LBA Mode this register contains Bits 0-7.

There you have it. 16+4+8=28 bits for the sector addressing, meaning 128 GiB addressable space, in both CHS and LBA mode, from ATA-1 onwards. *prior to ATA-1*, there were only 10 bits for the cylinder number, giving 10+4+8=22 bits for the sector addressing and 2 GiB addressable space.

The "maximum disk size" values in the article appear to be limitations mandated by various MS-DOS and/or BIOS routines (or weird combinations of both) that were in use at one time or another. There were no such limits in the underlying ATA controllers.

Unless I'm missing something obvious here, the text should be updated. Multi io 01:29, 21 May 2006 (UTC)[reply]

I just removed
ATA devices have suffered from a number of "barriers" in terms of how much data they can handle. However, new addressing systems and programming techniques have broken most of these barriers. Some of the ATA-specific barriers included: 504 MiB, ~8 GiB, ~32 GiB, and 128 GiB. A variety of other barriers have existed, usually due to device drivers and disk I/O layers in operating systems that did not correspond with ATA standards.
The paragraph below says the same thing in much better terms clearly attributing it to the PC BIOS. We still need some info on the 32 gig limit though. Plugwash 01:31, 21 May 2006 (UTC)[reply]
Oh -- yes, that paragraph seems accurate. I was referring to the table in "ATA standards, versions, ...". I've corrected that one now -- 28-bit addressing from ATA-1 onwards, as the spec and the paragraph says. Right? Multi io 02:29, 21 May 2006 (UTC)[reply]


Size limits

There's an excellent resource which provides detailed explanations of why and when a certain size limit was introduced. http://www.pcguide.com/ref/hdd/bios/size.htm --Dmitry (talk •contibs ) 08:11, 7 August 2006 (UTC)[reply]


ATAPI 8

what is new in ATAPI 8 ?

Updated from draft. --Dmitry (talk •contibs ) 08:10, 7 August 2006 (UTC)[reply]



Does the newest ATAPI version describe MWDMA & SWDMA or any type of DMA. Or does it just describe PIO, DMA and UDMA??

By the anybody know how these 2 works MWDMA (Maxiumum Multi Word DMA) SWDMA (Single Word DMA)

(My guess)---not sure on this one I think MWDMA is use for MLC NAND FLASH via other interfaces, like via IDE and other types of Media Cards. And SWDMA is probably for SLC NAND FLASH I think. --Ramu50 (talk) 01:09, 1 June 2008 (UTC)[reply]

2.5-inch drives?

The 44-pin interface on 2.5-inch drives - is that ATA also? If so, what are the extra 4 pins? - Brian Kendig 23:58, 7 June 2006 (UTC)[reply]

Yes, it's ATA. And you can get adapters (e.g. "laptop drive adapter") to use a 2.5-inch drive on a standard 40-pin ATA connector, or vice versa (in theory, I haven't seen one in that direction). The extra pins are for +5Vdc power and ground. Jeh 21:28, 3 July 2006 (UTC)[reply]

Missing in article

What is otherwise a quite decent article is missing any and all reference to the transfer rates of ATA devices when more than one device is connected on a data cable / port...

  • Will the transfer rate revert to the slowest device?
  • Will it revert per above only when the slower device is accessed?
  • Will that hold true for both, M/S & CS settings?
  • Will that hold true when data cable is 80-wire?

etc...

Excellent point. Does the article answer your questions now? It's a complex issue, not limited to just the actual transfer speeds. Jeh 03:03, 2 August 2006 (UTC)[reply]
   My Friend, that it's not true, article has a complete section than refers to speed impact in P-ATA devices called:
   "Two devices on one cable - speed impact"  —Preceding unsigned comment added by 190.49.63.206 (talk) 07:50, 6 December 2007 (UTC)[reply]

IDE != ATA?

The article frequently suggests that IDE was an early name given to ATA, but if ATA really does stand for "AT attachment", then this can't be the case. IDE comes in two forms, a version that implements the 16 bit AT ISA bus, and an eight bit version supporting the XT bus. (I've seen this referred to as XTIDE)

I only know this because the Amiga A590 SCSI controller contained a little used implementation of the eight bit version of IDE in addition to the built-in SCSI2 interface.

IDE redirects to this page, so the distinction probably should be made clear. —The preceding unsigned comment was added by 208.152.231.254 (talk • contribs) 00:19, 10 August 2006 (UTC)

IDE stands for "Integrated drive electronics", a non-standardized market name for any hard drive with built-in controller directly attached to the bus, and such drives existed many years before the official draft of ATA standard was introduced - they just used proprietary standards submitted by manufacturers, mostly Western Digital. The name reflects the fact that 16-bit AT bus attachment was the most popular choice of hard drive manufacturers until the rise of VESA Local Bus and PCI . --Dmitry (talk •contibs ) 10:33, 11 August 2006 (UTC)[reply]
ATA is a standard and IDE was the name given to a series of products, but as often happens the commercial name sticks. —The preceding unsigned comment was added by 85.227.137.159 (talk) 16:09, 6 May 2007 (UTC).[reply]

inconsistancy about int 13h extentions

the BIOS interrupt call article shows extended int13 as having 64 bits for offset and no indication of the size of the offset, the INT 13 article states "The original version of this interface supports 32-bit LBAs. Newer versions support 48-bit and 64-bit LBAs. These allow addressing of 2 TiB, 128 PiB, and 8 ZiB respectively.". Which is correct and if its the INT 13 article that is correct what are the real packet structure? Plugwash 10:45, 10 August 2006 (UTC)[reply]

  • It seems like the data packet allowed for 64-bit LBA right from the start (at least as of version 1.1 of Enhanced Disk Drive spec), but it later was altered to allow a 48-bit LBA in Enhanced Disk Drive version 2 (2004). The data structures still accept 64-bit number.--Dmitry (talk •contibs ) 10:23, 11 August 2006 (UTC)[reply]

EIDE=ATAPI?

I'd heard that IDE=ATA, and EIDE=ATAPI. Both are mentioned as being extensions for larger disk support; are they indeed synonymous terms? 70.228.77.77 03:49, 18 August 2006 (UTC)[reply]

See the section above, IDE != ATA. --Dmitry (talk •contibs ) 07:30, 18 August 2006 (UTC)[reply]
ATAPI more specifically is the ATA Packet Interface. On the whole, this article is rather sketchy. :\ —StationaryTraveller 08:16, 11 September 2006 (UTC)[reply]

HPA/DCO

It might be nice to see at least some mention of the HPA and DCO features added in later ATA revisions. -- TDM 13:58, 20 August 2006 (UTC)[reply]

Does someone know the meaning of these acronyms ..? , and their more specific context. Electron9 06:33, 11 October 2007 (UTC)[reply]
Host Protected Area and Device Configuration Overlay are features which allow one to hide areas of the physical disk from the operating system (and in the case of DCO, hide device features). I'm not an expert on these things and would love to see detailed articles on them. I see that HPA is now a separate article and is linked to, so that's a good start. DCO is newer and more mysterious and could definitely use more exposure. TDM 14:13, 15 November 2007 (UTC)[reply]

ATA standards versions, transfer rates, and features

The table says on ATA/ATAPI-7 (ATA-7, Ultra ATA/133) that there is SATA/150. But where is SATA/300 ? It is not listed. -- Frap

AT/ATAPI doesn't describe physical interface anymore - it could be Parallel ATA, Serial ATA or eSATA (and FireWire or USB for that matter), and any ATA/ATAPI drive will still respond to commands defined by the ATA/ATAPI standard (what's more, Serial ATA can also be used to interconnect SCSI devices as in Serial Attached SCSI). --Dmitry (talk •contibs ) 21:13, 5 October 2006 (UTC)[reply]

Compatibility

I learned today that at least for 2.5" laptop drives, EIDE is incompatible with SATA, despite apparently being a different version of the same protocol. Could someone explain, in general, which of the protocols in the table are compatible with which others (in either direction)? -- Beland 23:18, 14 December 2006 (UTC)[reply]

Merge with Programmed input/output and WDMA (computer)

Regarding the proposed merge with the two pages mentioned above: I agree, I think both pages should be merged into AT Attachment. 59.167.212.218 11:11, 29 January 2007 (UTC)[reply]

As far as I know, both PIO and WDMA can be used for non-AT Attachment devices, such as network adapters. I've seen references to PIO network adapters, so I fixed the PIO page to speak of them. Unless they're usable only for ATA devices, those pages should not be merged. Guy Harris 04:44, 31 January 2007 (UTC)[reply]
I agree with Guy. This proposed merge is a bad idea. Jeh 20:08, 4 February 2007 (UTC)[reply]
Clarification: Upon further thought, I think the material in the WDMA (computer) article as it stands now should probably be merged here; as it is it describes only DMA modes used by ATA and there is no purpose in a separate article. The same is true of the material now in the Programmed input/output article. That is not to say that there shouldn't be a separate article on PIO in general. There is already a separate article for Direct memory access, and it is correctly general, not specific to DMA under ATA. Jeh 02:04, 5 February 2007 (UTC)[reply]
I also agree that the PIO page should remain separate. PIO has been used for years by various kinds of devices: network cards, SCSI cards, bus mice, etc. In fact, PIO easily predates IDE/ATA, going back to the early MFM and ESDI cards (I think the first IBM PC floppy interfaces even used PIO). This may need to be clarified, but it should not be merged. EJSawyer 22:22, 13 March 2007 (UTC)[reply]
Sorry, but I strongly disagree. Did you actually read the "programmed input/output" page? It speaks only of PIO modes defined for ATA devices; these have nothing to do with PIO as used on any other device. Jeh 10:10, 14 March 2007 (UTC)[reply]
Yes, I've read it, and I agree with your earlier assertion that the PIO page it leans too heavily on ATA. But I've worked with PCs for nearly 25 years, and PIO predates ATA by at least 5 years. Clean it up? Sure. Merge it? No, that would be a mistake. EJSawyer 18:58, 23 March 2007 (UTC)[reply]
What I'm saying is that the ATA-specific stuff from the PIO page should be merged here (most of it is already here), with a reference link to here: "For information on AT Attachment-specific PIO modes, ... "
That will leave almost nothing in the existing PIO article. Yes, wiki needs a general article on programmed I/O, but the existing article is not it -- it has approximlately ONE sentence that is not ATA-specific. btw, the original IBM PC had DMA... it was required for the floppy controller! Both PIO and DMA concepts have been around for FAR longer than the PC; I first encountered them when building interfaces for and writing drivers for them on an HP 2100. Jeh 20:11, 23 March 2007 (UTC)[reply]

Proposed that the "cable select" article be merged into this one

The Cable select article amounts to three paragraphs and mostly repeats information already available here. The wikipedia "how to" page on merging suggests four good reasons for merging a page. This qualifies under three of the four. If the "cable select" concept applied to anything but ATA that would be a different story, but it does not. Jeh 20:16, 4 February 2007 (UTC)[reply]

Using cable select with this cable select compatible 40-conductor cable, a device connected to the black connector on the left side of this IDE cable is a master, a device in the middle (usually gray) is a slave, and the connector on the right (usually blue) connects to the IDE controller, most often the motherboard.
Merge. Here's a picture from that page, just in case anyone wants it again. Please note though that the text is inconsistent with the usual implementation of CS on 40-conductor cables, wherein "slave" goes at the end.

I might describe the select method used for floppy drives with a twist in the cable as a form of cable select. Otherwise, I don't know of others.

Gah4 04:56, 12 September 2007 (UTC)[reply]

ATA != UDMA

UDMA is a group of ATA transfer modes and thus not a synonym for ATA as claimed in the second paragraph. (130.234.5.136)

Fixed. (which you could have done, you know. ;) ) Jeh 21:03, 6 March 2007 (UTC)[reply]

Use of the phrase All but

The phrase all but was used in the following context "the short cable standard all but completely elimates the use of pata for external devices" To the average person they would take that as that pata CAN be used for external devices. too many people use all but as an intensifier when really it means "everything except" . to say all but elimated means that it is NOT elimated. that it does EVERYTHING EXCEPT eliminate. COMMENTS ANYONE?

Yes, and "everything except completely eliminate" was correct, because situations in which PATA could be used for an external device are not absolutely impossible... just very unusual. In fact I have such a situation here. I've changed the graf to express this more clearly while avoiding the "all but" usage. Jeh 20:48, 31 May 2007 (UTC)[reply]

Wow thanks. I appreciate you changing that without using all but. most people use that as intensifier when it is not

Apparent error in the "cable select" section.

I think this passage is confusing or inaccurate:

"With the 40-wire cable it was very common to implement cable select by simply cutting the pin 28 wire between the two device connectors. This puts the slave device at the end of the cable, and the master on the "middle" connector. This arrangement eventually was standardized in later versions of the specification. If there is just one device on the cable, this results in an unused "stub" of cable. This is undesirable, both for physical convenience and electrical reasons: The stub causes signal reflections, particularly at higher transfer rates."

I would've fixed it myself, but I'm not sure I understand it. If early users were hacking ribbon cables to have an open pin 28, that would only work by cutting between the second and third connection. This would put the master to the middle connector, as the passage says. It says this arrangement was standardized in later versions, but all the ATA ribbon cables I've seen put the black master connector at the end, and the gray slave in the middle. I think what the passage means to say is that these early hacks had the opposite configuration of modern cables, which just leave gray pin 28 with no wire contact. Someone who understands what this paragraph is trying to say should probably fix it so someone doesn't put their cables on backward. --Loqi T. 02:51, 7 June 2007 (UTC)[reply]

Inherent design flaws

In answer to an earlier edit:

  • Equipment following the ATA4-spec or earlier is still out there.
True and you have to use the proper power off commands to shut it down and don't get enough info.
  • The cache issue with removed power is specific to ATA due that a drive will not tell controller if data has been written to platters or not. In a raid setup where the on drive write cache is not disabled may put data at risk. (something some admins swear over and manufactors obscure in fine print)
It isn't specific to ATA, its a property of having a write back cache. On a correctly implemented RAID (and file system) the journal sequencing means it is all nicely sequenced. The OS has to propogate any flush points from the OS layer down to hardware as with SCSI and anything else. 81.2.110.250 21:49, 16 August 2007 (UTC)[reply]
  • Earlier drives does not allow overlapped requests. Only very lately have this been fixed. And many implementations still make a mess, like SiliconImage 3112A.
Mess ? SI3112A makes no mess, its simply too old to do stuff like NCQ as its a taskfile controller 81.2.110.250
  • Current specification may define electrical specification. Older is a mess. And yet many implementations do not follow sound electricial considerations anyway.
  • BIOS still does CHS. Just waiting for someone to make a mistake.
Not a bug (The drive reports geometry and the mapping is standardised and covered by EDD) 81.2.110.250
  • CRC should be mentioned with other pitfalls to have them collected in one place. Althought I let this slip.

I would like to see exactly why commands without checksum check is not an issue. When signals are 0-10..20 MHz this is not a big problem. But when signals are faster there might be issues with data integrity. There's lot's of equipment "out there" with the flaws. That might pop up when doing datarescue or upgrading servers noone bothered with until it didn't work anymore. Previous flaws also have implication on wheather how to view the soundness of feature ATA standards. If you disagree, then show in the ATA specifications where it's wrong.

Your comments about flush_cache are strange - there is no flaw here. When you issue flush_cache and get an error the sector with the error is

dropped from the cache. If you care you don't discard host side caches until you flush. As its dropped from the cache you can reissue flush cache to continue flushing the rest of the cache 81.2.110.250 Oh I may do grammar mistakes but I didn't claim to be perfect either. Electron9 23:46, 5 July 2007 (UTC)[reply]

Unchecksummed signals are a problem simply because however low the bit rate the number of bits transferred is astronomical and growing at a huge rate 81.2.110.250

But, they're not. The uncheckedsummed signals are only used for the commands, not the data. Jeh 01:53, 22 August 2007 (UTC)[reply]

I'm sorry but I can't agree that this section belongs in the article as currently constructed. It is basically a laundry list of unstructured criticisms, and as such runs afoul of WP:CRITICISM and WP:NPOV. Wikipedia is not a place for highly pejorative and obviously non-NPOV comments on products or designs. Certainly, "People should know" is not justification for inserting such material as the second major section of the article, before any of the technical background underlying the points made has been presented! . Perhaps you could distribute the points made here throughout the article in appropriate places... and you are going to have to do some considerable writing to provide the necessary background in some of these cases. You have also yet to provide any evidence that these "inherent flaws" actually create any problems for the vast majority of users.... For now I am moving the section to near the end, and renaming it to something a little more appropriate. —The preceding unsigned comment was added by Jeh (talk • contribs) 02:08, August 22, 2007 (UTC).

...and making a few other changes. Jeh 03:11, 22 August 2007 (UTC)[reply]

windows limitations

according to http://discountechnology.com/Seagate-160GB-IDE-ATA-100-Hard-Drive:

  • windows 2000 up to sp3 have a limitation of 137 GB
  • windows xp up to sp1 have a limitation of 137 GB

so we could add it asomewhere
GNUtoo 12:50, 13 July 2007 (UTC)[reply]

Found some further info at seagate d17 sata product manual google cache in section 3.8.1:
W2000 Sp3 + XP Sp1 needs "Big Drive Enabler"
Maxtor Knowledge Base Answer ID 960
MS KB 303013
Electron9 23:59, 25 July 2007 (UTC)[reply]

Compatability between types

I have a laptop with an ATA-4 hard drive. I would like to place a drive with an ATA-6 inside instead. Is that possible? Thanks!

PATA vs. SATA use widespreadness

The page says, about PATA that "[i]t provides the most common and the least expensive interface for this application". In light of motherboards sold currently (08/2007) and introduced in the past year, I'd say this is no longer true. Most of the motherboards sport only a single PATA connector, meant for DVD drive, and hard drives are expected to be attached to the SATA connectors. Also PATA versions of new drives have for some time been a bit harder to come by, and often a bit more expensive, or at least equal in price to SATA ones.

Thus I propose we'd change the page to reflect this. Something like "From 199x all the way to 2006 it provided the most common and least expensive.."

Zds 11:15, 23 August 2007 (UTC)[reply]

P-ATA was in use before 199x. Also P-ATA will proberbly be used by embedded products for a long time. Since S-ATA interfaces are hard to find in a single chip (S-ATA PHY). Electron9 22:56, 16 September 2007 (UTC)[reply]

size limits

Good article, but too bad it does not list all the size boundaries. This article seems excellent, mentions the Win98 64GB boundary: [1] -69.87.199.99 19:53, 18 September 2007 (UTC)[reply]

ATA standards table inconsistent

ATA-1 was listed as 137 GB capable. And 28 bit LBA as introduced with ATA-2.

ATA-1 specification: 

ftp.t10.org/t13/project/d0791r4c-ATA-1.pdf

                              LBA Bits:
7.2.8  Drive/head register      27-24
7.2.3 Cylinder high register    23-16
7.2.4 Cylinder low register     15- 8
7.2.12 Sector number register    7- 0

7.2 Table 6 - Shows this with clearity

The following calculation gives the "marketing gigabytes" (228 * 512) / (109) = 137GB
I hope this makes it obvious that 137GB + 28 bit LBA was available with ATA-1. Electron9 15:21, 20 September 2007 (UTC)[reply]

comparing IDE/ATA speed with others

The speed presented in this article is in MB/s, generally accepted as the abbreviation of Megabyte per second. In the SATA and USB aritcles the speed is presented in Mbits/s (Megabits per second). Could someone check the speed of ATA in Mbits/s please? it is possible it is alredy in megabits but somone did not write it properly. --Iamcon (talk) 07:01, 22 January 2008 (UTC)[reply]

The speeds quoted here are the correct numbers for megabytes/second (where mega = 1,000,000). For example, UDMA 5 runs at 100,000,000 bytes/second. I hope this is unambiguous enough.
The reason SATA and USB quote in bits per second is that they are serial protocols: one bit is sent at a time. Parallel ATA is not like that; it sends 16 data bits at a time. In each case these are the "natural" units, according to the respective technologies. They are also the same units and numbers quoted in industry standard specifications and sales information for these interfaces.
You can't just take the PATA number and multiply by eight to get a number comparable with serial protocols, either. SATA uses an encoding involving 10 bits on the wire for eight bits on the disk. The "1.5 Gbit/sec" figure for the original SATA is the bit rate on the wire, not on the disk, and translates to 120 megabytes/second of actual data read or written. USB uses a "bit-stuffing" protocol in which the ratio is not even constant. Jeh (talk) 07:32, 22 January 2008 (UTC)[reply]
Bits may be transferred by different means, it still boils down to effective transmission capacity per second. And associated latency. It's much harder to make comparisions when the same thing is noted in different units. Electron9 (talk) 15:02, 15 February 2008 (UTC)[reply]
The point I'm making is that "effective transmission capacity per second" is, at least, more accurate for PATA's "133 MB/sec", than for SATA's "1.5 Gb/sec": All issues of latency, inter-block delays, etc., aside, it is possible that there could be periods of time during which PATA would be transferring 133 MB/sec of end user data. This can't be said of SATA's "1.5 Gb/sec". Yes, switching units makes things even more confusing, but it would also be confusing to cite specs for these buses using units other than those commonly quoted. Adding corrections for e.g. 10 physical-layer bits to 8 transport-layer bits would simply compound the confusion, and would likely result in frequent "corrections" by new wiki editors who didn't stop to read the explanations.
I do think it would be worthwhile to "rationalize" all of these specs so that useful comparisons could be made (perhaps in a separate article pointed to by the PATA, SATA, USB, etc., articles), but this should be done in addition to, not instead of, cites of the "official" numbers using the usual units for each. Also it should be done with a LOT of explanation. Jeh (talk) 00:59, 16 February 2008 (UTC)[reply]
I suggest then to add a seperate value "effective transfer rate". Electron9 (talk) 07:12, 16 February 2008 (UTC)[reply]

Six IDE units

Nowadays computer motherboards generally support 4 IDE units (2 HD and 2 DVD), I use 1 for Linux and 1 for Windows, but I would prefer a 6 IDE units (4 HD and 2 DVD), to install more Linux distros without partitions. --Nopetro (talk) 08:00, 15 February 2008 (UTC)[reply]

The easy solution is to use SCSI, because the controller software usually have support to play around with discs in any matter you can dream up. BIOS is likely the most limiting factor. With S-ATA there's no real reson to be limited to finite number of discs. So you can look for a controller board that have the scsi functionality with S-ATA discs. Electron9 (talk) 15:05, 15 February 2008 (UTC)[reply]
Actually many recent chipsets (and hence motherboards) support just one PATA channel, and four or more SATA ports. I'm not sure why the BIOS would be the limiting factor in adding a SCSI controller, or a SATA controller either; no BIOS (whether on the mobo or on the add-in controller) need be involved for non-boot devices. Finally, what do you mean by "SCSI functionality with S-ATA discs"? Jeh (talk) 00:49, 16 February 2008 (UTC)[reply]
The question was regarding "install more Linux distros without partitions", booting partitions with a boot manager is no problem. However booting other discs than "primary" when several discs are available is not trivial. When you need boot functionality beyond the primary disc, problem starts. Because the BIOS paradigm is one bootdisc, rest datadiscs. SCSI controller BIOS usually handle multiple boot discs smoothly. So what is needed for S-ATA is a controller offering the same functionality, ie allowing user to select bootdisc at startup. Electron9 (talk) 07:22, 16 February 2008 (UTC)[reply]

Passwords / security

From this article:

In Maximum security mode, you cannot unlock the disk! The only way to get the disk back to a usable state is to issue the SECURITY ERASE PREPARE command, immediately followed by SECURITY ERASE UNIT. The SECURITY ERASE UNIT command requires the Master password and will completely erase all data on the disk. The operation is rather slow, expect half an hour or more for big disks. (Word 89 in the IDENTIFY response indicates how long the operation will take.) [3] [4]

From the article in c't:

When setting his or her password the user can choose between the security levels "High" and "Maximum." When the level "High" is chosen the disk will accept either the user or the master password to unlock the disk or disable the protection function. When "Maximum" is the choice only the user password will provide access to the data. Should it get lost then the administrator with his or her master password will only be able to unlock the disk after forfeiting all the data stored upon it. Which step is accomplished by the command Security Erase: It erases all the information by writing zeros onto all sectors of the hard disk before again allowing access to it.

These seem contradictory.

Ealex292 (talk) 02:44, 28 April 2008 (UTC)[reply]

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